On July 1st, Toshiba Corporation's Semiconductor Company and Storage Products Company consolidated to form Semiconductor & Storage Products Company.This page describes reliability information of semiconductor products.
Design Approval Test Procedures
[As of April, 2011]
Semiconductor reliability tests are performed in the research and development phase and in the mass production phase. During research and development, reliability tests are used to evaluate design quality, materials and processes. During mass production they are used as design approval tests and for periodic reliability monitoring.
As shown in Figure 1, the design approval test (DAT) procedure uses a test element group (TEG) primarily to evaluate the wafer process and package during research and development, and to obtain basic data for design optimization. The product is designed based on this data, and a prototype is used for the DAT. When evaluated, the product is classified into families according to the design rule and package, and reliability testing is performed on a representative product from each family.
The tests performed include electrical characteristics, early failure rate (EFR), long-term lifetime or random failure rate (IFR), threshold and environment tests. Reliability tests for products other than the representative products are mainly based on electrical characteristics and small samples. Table 1 shows an example of a DAT for a typical memory product.
![This is [Figure 1 Design Approval Test Procedure]. This is [Figure 1 Design Approval Test Procedure].](/eng/product/reliability/device/testing/testing3/__icsFiles/artimage/2009/10/28/ec_relia5_33/E_03-037_z04-01_300.gif)
Figure 1 Design Approval Test Procedure
| Test | Test Conditions | Remarks |
|---|---|---|
| High-Temperature Operation | Apply maximum guaranteed operating voltage or accelerated voltage at 125°C. | Test for 1,000 h |
| High-Temperature Bias | Apply maximum guaranteed operating voltage or accelerated voltage at 125°C. | Test for 1,000 h |
| High-Temperature Storage | 150°C | Test for 1,000 h |
| Low-Temperature Operation | Apply maximum guaranteed operating voltage or accelerated voltage at −30°C. | Test for 1,000 h |
| Test | Test Conditions | Remarks |
|---|---|---|
| Temperature Humidity Bias | Apply maximum guaranteed operating voltage at 85°C/85% | Test for 1,000 h |
| High-Acceleration Stress | Apply maximum guaranteed operating voltage at 130°C/85% | Test for 300 h |
| Temperature Cycling | One cycle consists of −65°C (20 min) followed by 150°C (20 min) | Test for 300 cycles |
| Pressure Cooker | 127°C/100% (2.53 × 105Pa) | Test for 120 h |
| Test | Test Conditions | Remarks |
|---|---|---|
| Soldering Iron Heat | Soldering temperature: 400°C, applied twice for 3 seconds | Only the leads are immersed |
| Temperature Cycling | One cycle consists of −65°C (20 min) followed by 150°C (20 min) | Test for 300 cycles |
| Thermal Shock | One cycle consists of 0°C (5 min) followed by 100°C (5 min), complete transition within 10 s | Test for 100 cycles |
| Moisture Resistance |
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Test for 10 cycles |
| Test | Test Conditions | Remarks |
|---|---|---|
| Vibration Variable Frequency | 100 to 2000 to 100 Hz | ← (4 min) → | 200 m/s, applied in 2 or 3 directions, four times each |
|
| Mechanical Shock | 15000m/s2, 0.5 ms, applied in four directions, 3 times each | |
| Constant Acceleration | 200000m/s2, applied is 6 directions, each for one minute |
| Test | Test Conditions | Remarks |
|---|---|---|
| Solderability | Solder bath temperature: 245°C, applied once for five seconds (using flux) | Only the leads are soldered. Leads with solder deposition rates of 95% or higher are considered good. |
| Salt Atmosphere | Left in 5% salt spray atmosphere at 35°C for 24 h |
On July 1st, Toshiba Corporation's Semiconductor Company and Storage Products Company consolidated to form Semiconductor & Storage Products Company.This page describes reliability information of semiconductor products.






![This is [Moisture Resistance].](/eng/product/reliability/device/testing/testing3/__icsFiles/artimage/2009/10/28/ec_relia5_33/E_03-039_z01.gif)