On July 1st, Toshiba Corporation's Semiconductor Company and Storage Products Company consolidated to form Semiconductor & Storage Products Company.This page describes reliability information of semiconductor products.

Reliability Test Methods

[As of April, 2011]

Reliability test methods include TEG evaluation, in which special sets of devices (referred to as a test element group or TEG) are created for each failure cause, and product evaluation, whereby the product is comprehensively evaluated.

TEG Evaluation

TEG evaluation targets basic failure mechanisms. In this method, a set of devices is manufactured especially for the evaluation and analysis of each failure mechanism. The method allows detailed evaluation and failure analysis of failure mechanisms, and is very effective for quantifying limits and acceleration capabilities. Table 1 shows an example of TEG evaluation method.
Depending on the objective, TEG evaluation can be performed either by on wafer or an encapsulated package. TEG evaluation has four major objectives:

During DAT (design approval testing) of new technology and products, it is used tofind the method of elimination for failure mechanisms that affect reliability. The various kinds of TEG shown in Table 1 are used to evaluate failure mechanisms attributable to the process or the design.
Clarify failure mechanisms involved in defects found during the product evaluation phase.
For monitoring manufacturing process parameters, monitor process quality control items such as film thickness, film shape and contamination, and failure rates for each process and design rule.
Develop TEG for each function block and estimate product reliability lifetime and failure rate from each TEG combination.
In this manner, the TEG can be used for various purposes to precisely obtain accurate and appropriate data.

Table 1 TEG Evaluation Examples
TEG Structure	Evaluation Target	Design Process Parameter	Stress	Evaluation Method	Evaluation Parameters
MOS capacitor	Gate oxide film breakdown Ion drift Interface trap Process damage Variation in manufacturing conditions Radiation effect	Gate film thickness Gate film quality Oxidation method Gate film material Electrode material Contamination Surface area Shape Dimensions	Temperature Voltage Electric field Current	TDDB (constant current, constant voltage, step stress) Oxide film breakdown voltage test C-V (Pulse C-V) DLTS (deep level transient spectroscopy)	Failure rate vs. time Oxide film breakdown voltage Q_BD (oxide film breakdown charge) Electric field acceleration coefficient Activation energy C_OX (oxide film capacitance) Failure rate
MOS transistor	Hot carrier effect Negative bias stability Ion drift Interface trap Variation in manufacturing conditions Process damage Short channel effect Field leak	Gate size (W/L) Gate film thickness Gate film quality Electrode material Contamination Passivation Material Shape and structure Ion implantation conditions	Temperature Electric field Mechanical stress Current	High temperature DC biased test Low temperature DC biased test Charge pumping test DC pulse test	ΔV_th (threshold voltage degradation) ΔI_d (drain current degradation) Δg_m (g_{mM/sub> degradation) Voltage acceleration coefficient Activation energy Sub-threshold characteristics Field breakdown voltage}
Multi-layer metallization (metal, diffusion layer, interlayer insulating film)	Stress migration Electro migration Contact open Interlayer breakdown voltage Corrosion	Metallization material Metallization width Metallization space Through-hole diameter Contact diameter Step, hole shape Interlayer insulating film Passivation Molding resin	Temperature Current density Temperature gradient Voltage Mechanical stress Temperature and humidity	High temperature constant current test High temperature storage test Temperature cycle test Reflow treating (or processing) High temperature high humidity biased test Pressure cooker test (or unbiased autoclave test)	Resistance change Failure rate vs. time Activation energy Current density dependence Open Short
Function block	Process monitoring Failure rate estimation Process approval Humidity resistance	Shape, dimensions, number of elements Gate film thickness Gate film quality Interlayer film quality	Temperature Voltage	High temperature biased (DC/pulse) test Low temperature biased (DC/pulse) test High temperature storage test, etc.	Failure rate vs. time Activation energy Voltage acceleration Standby current AC/DC parameters

Product Evaluation

TEG evaluation produces detailed and well-related data for each failure mechanism. However, defects due to inconsistencies and the synergy effect resulting from combinations of failure mechanisms are difficult to be detected. Therefore, as a complement to TEG evaluation, a comprehensive product evaluation must be performed.
Product reliability testing is preferably performed under actual field environment conditions to the extent possible and must always be repeatable. Selecting the test methods, shown in Table 3, among common tests to semiconductor products as the methods compliant with JIS, JEITA, MIL, IEC and JEDEC, Toshiba standardizes them and conducts an appropriate test or tests selected according to device groups. In addition, tests for electrostatic discharge (ESD), latch-up strength, soft error and other conditions are performed under field environmental and climatic conditions.

Table 2 Reliability Test Standards
Japan Electronics and Information Technology Industries Association (JEITTA) Standards EIAJ ED-4701/001 Environmentarl and endurance test methods for Semiconductor Devices (General) EIAJ ED-4701/100 Environmentarl and endurance test methods for Semiconductor Devices (Lifetime Test I) EIAJ ED-4701/200 Environmentarl and endurance test methods for Semiconductor Devices (Lifetime Test II) EIAJ ED-4701/300 Environmentarl and endurance test methods for Semiconductor Devices (Strength Test I) EIAJ ED-4701/400 Environmentarl and endurance test methods for Semiconductor Devices (Strength Test II) EIAJ ED-4701/500 Environmentarl and endurance test methods for Semiconductor Devices (Other Tests)
US Military (MIL) Standards MIL-STD-202 Test Methods for Electronic and Electrical Parts MIL-STD-883 Test Methods and Procedures for Microelectronics
International Electrotechnical Commission (IEC) Standards IEC 60749 Semiconductor devices- Mechanical and climatic test methods IEC 60068-1 Environmental testing Part 1: General and guidance IEC 60068-2 Environmental testing Part 2
Joint Electron Devices Engineering (JEDEC) Standards JESD 22 Series Test Methods JESD 78 IC Latch-Up Test
Japanese Industrial Standards (JIS) [General] JIS C 00XX (IEC 60068-2) Environment Testing Methods (Electricity and Electronics) Series
CENELEC Electronic Components Committee (CECC) CECC 90000 General Specification Monolithic Integrated Circuit CECC 90100 General Specification Digital Monolithic Integrated Circuit

Table 3 Product Reliability Test Method Examples
Type	Test	Description and Test Conditions	Standards
Type	Test	Description and Test Conditions	EIAJ ED-4701	MIL-STD-883	IEC 60749	JESD22
Lifetime Test	High temperature operating life test	Apply electrical stress (voltage, current) and thermal stress to the device for an extended period of time and evaluate the resistance. Normal test conditions: Ta = 125°C Power supply voltage = Max. operating voltage	101	1005.8	Part 23	A108-B
	High temperature high humidity biased test	Apply electrical stress (voltage, current), thermal stress and moisture to the device for an extended period of time and evaluate the resistance. Normal test conditions: Ta = 85°C, RH = 85% Power supply voltage = Max. operating voltage	102	-	Part 5	A101-B
	High temperature storage test	Apply high temperature to the device for an extended period of time. Normal test conditions: Ta = Tstg. max	201	1008.2	Part 6	A103-C
	Low temperature storage test	Apply low temperature to the device for an extended period of time. Normal test conditions: Ta = Tstg. min	202	-	-	-
	High temperature high humidity storage test	Apply high temperature, high humidity to the device for an extended period of time. Normal test conditions: Ta = 60°C, RH = 90%	103	-	-	-
Thermal Environment Tests	Soldering heat resistance test	Evaluate heat resistance during soldering. Normal test conditions: Solder bath temperature: 260°C ±5°C Dipping time: 10±1 seconds Distance from immersed part from device body: 1.5 ± 0.8 mm	104301/302	STD-750-2031	Part 20	B106-C/ A112-A
Thermal Environment Tests	Temperature cycle test	Evaluate the resistance to low and high temperatures and temperature change. Normal test conditions:	105	1010.7	Part 25	A104-B
Thermal Environment Tests	Thermal shock test	Evaluate the resistance to sudden temperature changes. Normal test conditions	307	1011.9	Part 11	A106-B
Thermal Environment Tests	Moisture resistance test (high temperature high humidity cycle test)	Evaluate resistance under high temperature, high humidity conditions. Normal test conditions:	203	1004.7	-	A100-B
Mechanical Tests	Vibration test	Evaluate resistance to the vibration applied during transport and usage. The test includes variable and constant frequency vibration; normally variable is used. Normal test conditions: Constant frequency vibration: 60 ± 20 Hz, 200 m/s² in three directions, 96 ± 8H in each directionVariable frequency vibration: 100 to 2000 Hz 200 m/s² in three directions, four cycles per direction, four minutes per cycle	403	2007.2	Part 12	B103-B
	MechanicalShock test	Evaluate resistance to the shock applied during transport and usage. Normal test conditions: Depends on device structure. With resin molded devices, shock acceleration of 15,000 m/s² is applied three times in each of four directions.	404	2002.3	Part 10	B104-C
	Constant acceleration test	Evaluate resistance to constant acceleration. Normal test conditions: Depends on device structure. With resin molded devices, acceleration of 200,000 m/s² is applied in six direction, each for one minute	405	2001.2	Part 36	-
	Terminal strength test	Evaluate whether or not the strength of the terminal area is sufficient for the force applied during installation and usage. Normal test conditions: Suspend a prescribed load onto the tip of the lead to bend it 90° and back. Apply tensile force in a direction parallel to the lead. The prescribed load varies according to device structure.	401	2004.5	Part 14	B105-C
Mechanical Tests	Solder-ability test	Evaluate terminal solderability. Normal test conditions: Solder bath temperature: 245°C, Dipping time: 5 sec. (lead-free solder)	303	2003	Part 21	B102-D
	Sealing test	Evaluate the airtightness of the seal. Use bubbles to detect large leaks. This test is suitable for metallic and ceramic packages.	503	1014	Part 8	A109-A
	Salt atmosphere test	Evaluate the resistance to corrosion in a salt atmosphere. Normal test conditions: 35°C, 5% salt solution, 24 hours	204	1009	Part 13	A107-B
Other	Unbiased autoclave test (or Pressure cooker test)	Evaluate resistance when stored under pressure under high temperature, high humidity for a short period of time. Normal test conditions: 203 to 255kPa, RH = 100%	-	-	Part 33	A102-C
	Electrostatic discharge test	Evaluate the resistance to static electricity. Normal test conditions: Human body model: C = 100 pF, R = 1.5 kW, three discharges Machine model: C = 200 pF, R = 0 W, one discharge Device charge model	304/305	3015.7	Part 26 Part 27 (Part 28)	A114-C/A115-A/C101-C
	Latch-up strength test	Evaluate resistance to latch-up. Normal test conditions: Pulse current injection method, V_supply overvoltage test	306	-	Part 29	JESD78