On July 1st, Toshiba Corporation's Semiconductor Company and Storage Products Company consolidated to form Semiconductor & Storage Products Company.This page describes reliability information of semiconductor products.

Failure Mechanisms

[As of April, 2011]

Packages

Resin-Encapsulated Packages

Ionic Impurities in Resin
As described previously, with resin-encapsulated devices, instability in and degradation of device operation or fatal Al corrosion can occur due to ionic impurities in the resin material. As a result, encapsulation must be performed using resin that contains a minimal level of ionic impurities so as to improve moisture resistance. Ionic impurities in the resin are evaluated using the hot water extraction method. Of the various ionic impurities, Cl⁻ ion is thought to especially have a pronounced effect on moisture resistance.
The following are the results of an experiment conducted at Toshiba to determine the correlation between device instability and Al corrosion caused by ionic substances in the resin.^{Note 1} As already mentioned, formation of a parasitic MOS due to the accumulation of ions is one of the typical mechanisms of device degradation caused by ionic impurities in the resin. Utilizing this phenomenon, it is possible to evaluate the ionic substance in the resin by the ion accumulation rates on the gate oxide film, as shown in Figure 1. This is done by applying bias at high temperature to an ion-sensitive TEG device after it has been encapsulated by resin. The ion accumulation model can be explained by the transient phenomenon model shown in Figure 1 (c). This model is based on the bulk resistivity ρ_v (or bulk resistance Rr), which is the reciprocal of the bulk conductivity, which in turn is proportional to the concentration of ionic impurities in the resin multiplied by the ionic charge multiplied by the ion mobility. The model also includes the resin-SiO₂ interface resistance Rγ and the oxide film’s equivalent capacitance C_ox.

In this model, the potential of the oxide film surface (equivalent gate voltage V_G^*) when Rγ >> Rr can be approximated by the expression:

where V_A is the saturated value of V_G^*, and τ equals Cox*• Rr, a time constant dependent on the bulk resistance of the resin.
From the above, the corresponding relationship between Rr or ρ_v and τ is evident. The smaller the ρ_v or Rr, the larger the ion conductivity and, consequently, the greater the number of ions which reach the surface. This type of resin leads easily to unstable device operation and Al corrosion.

Figure 1 Charge Accumulation Model of Spacer Structure

Figure 2 shows the correlation of the above-described τ and the rate of Al metal corrosion. Al metal corrosion diminishes as τ becomes larger.

Figure 2 Correlation between Time Constant τ and Al Corrosion at High Temperature

Figure 3 shows the temperature dependency of τ. The activation energy is approximately 0.9 to 1 eV, which conforms to the temperature dependency of bulk resistance of resin shown in Figure 4. Figure 5 shows the degradation of bulk resistance due to moisture absorption. The figure indicates that bulk resistance degrades as an exponential function of moisture absorption.
From the above, it can be said that high-temperature bulk resistance of resin and bulk resistance degradation by temperature and humidity are the important parameters in expressing resin reliability.
In addition, adhesion with the metal or chip surface, moisture permeability and moisture absorption are also factors that affect moisture resistance of resin-encapsulated devices. The epoxy resin used in resin-encapsulated devices is a controlled resin featuring low stress, high absorption, and minimal impurities.

Figure 3 Temperature Dependency of Time Constant τ

Figure 4 emperature Dependency of Resin on Bulk Resistance

Figure 5 Dependency of Bulk Resistance on Humidity Absorption

Resin used for semiconductor encapsulation contracts as a result of resin polymerization, applying a significant amount of stress to the semiconductor chip in contact with the resin. Consequently, resistor values of the device resistor fluctuate due to a piezo-resistance effect, greatly affecting device characteristics. Stress also causes Al slide and passivation cracks.
A Toshiba experiment to determine the stress generated in a resin-encapsulated silicon chip is discussed below.^{Note 2}
Stress is measured on TEG devices which have resistors constructed on the silicon chip. A general formula for the piezo-resistance effect is:

This is the equation for the piezo-resistance effect.

where δρ_i is the resistance change rate, π'_ij is the piezo-resistance coefficient, and τ_j is the stress.
For τ_j, the following formula is used:

τ₁ = σ_x, τ₂ = σ_y, τ₃ = σ_x ……Formula 2
τ₄ = σ_yz, τ₅ = σ_zx, τ₃ = σ_xy

Since a silicon chip is extremely thin, it can be assumed that σ_x, σ_y >> σ_z. In addition, the piezo-resistance coefficient π'_ij is the tensor of the fourth order determined by the semiconductor conductivity type, crystal orientation, resistor direction and impurities present. The value of π'_ij can be found by applying a given stress for which these parameters are known to the TEG devices.
From formulas 1 and 2, the stress is determined as follows:

These are the equations for the stress.

Where coefficients A, B and C are as shown in Table 1.

Table 1 Coefficients Used in Stress Measurement^{Note 2}
CoefficientOrientation	A	B	C
100	π₁₁ + π₁₂	-π₄₄	-2 (π₁₁ - π₁₂)
111	π'₁₁ + π'₁₂	-π'₁₁ + π'₁₂	-2 (π'₁₁ - π'₁₂)

Table 2 shows the stress measurement results when a TEG device with a chip size of 3 mm² is encapsulated in a 16-pin DIP package. Stress is found for the chip while it is in wafer form. Internal chip stress is found to be non-uniform, larger in a longitudinal direction at the center, and different at the center and periphery.

Table 2 Measured Mean Stress Using {100} P-Type Resistors^{Note 3}
Unit: N/cm²
Location		Process
Location		Mount	Mold	Cure 2h
a Center	σ_x	-4312	-11760	-16072
	σ_y	-5292	-16366	-22050
	τ_xy	107.8	-58.8	39.2
b Periphery	σ_x	-4018	-6076	-11564
	σ_y	-5880	-7154	-13524
	τ_xy	245	1479.8	1783.6

Figure 6 shows the TEG device used to find the distribution of internal chip stress. Resisters arranged in the three directions shown in (b) are treated as a unit, with 55 units to a chip.
Figure 7 shows the distribution of stresses σ_x, σ_y and σ_xy after encapsulation.
These experimental results are fed back to the design section.^{Note 4}

This is [Figure 6 Structure of Resistor TEG].

Figure 6 Structure of Resistor TEG^{Note 3, 5}

This is [Figure 7 Stress Distribution after Encapsulation].

Figure 7 Stress Distribution after Encapsulation^{Note 3}

Top Passivation Crack Caused by Fillers in Mold Resin^{Note 5}
Mold resins contain SiO₂ fillers. When these fillers exist in the interface between the chip and resin as inclusion, cracks can form in the passivation due to the mechanical stress indirectly produced by TCT and other factors, causing the Al beneath the crack to deform and the crack to extend to the interlayer film beneath the Al. This can form a leakage path in the crack and cause a leak between the Al and the Poly-Si beneath the Al, resulting in device failure. A countermeasure is to apply a polyimide coating to the chip surface.
Effect on Reliability of Soldering Stress in Surface-Mounted Devices
Resin-encapsulated packages are fabricated in various shapes since they are easily formed. Consequently, a wide variety of surface-mount products have been developed to increase the IC density on circuit boards.
Compared to board-insertion type packages such as Dual Inline Packages (DIPs) and Single Inline Packages (SIPs), Surface Mounted Devices (SMDs) are prone to package cracks and degradation of moisture resistance since the resin may be exposed to direct heat during mounting. Recently, the trend towards using thin packages and increased chip size make surface-mounted devices even more susceptible to thermal stress during soldering. In addition, with the development of lead-free products, the upper temperature limit for most packages has increased from 240 to 260°C. If this limit cannot be met by current resin, change to a resin with high adhesion properties must be considered.
The reliability of SMDs is sometimes determined by the soldering conditions. Thus, when products are mounted, moisture absorption control and soldering conditions must be carefully studied and considered.
The following is a discussion of the reliability of SMDs in relation to moisture absorption and moisture removal characteristics, and the soldering heat related package cracking mechanism.
1. Package Moisture Absorption and Moisture Removal Characteristics
  Resin used for resin-encapsulated semiconductor devices is basically porous and exhibits moisture permeability. For this reason, SMDs comprising especially thin resin can pose a significant reliability problem. This can occur during soldering when moisture, absorbed in the package, evaporates with a sudden rise in package temperature, causing the package itself to expand or the interface to peel away and gaps to form between the lead frame and resin.
  In consequence, there is a close relationship between the amount of moisture absorbed by the SMD package and its reliability after soldering. The following discusses moisture absorption and moisture removal in an SMD.
  - Moisture Absorption
    Figure 8 shows the moisture absorption characteristics of a 256-pin LQFP (resin thickness: 1.4 mm) in each shelf environment (temperature, relative humidity). The horizontal axis indicates the time the device remains on the shelf, and the vertical axis indicates the rate of change in the amount of moisture absorbed. The rate of change in moisture absorption is indicated as a percentage value found by dividing the amount of moisture absorbed by the weight of the package before the product was left on the shelf.
    From this diagram, it is evident that when the temperature is low, more time is required for the saturation region to be reached; and when the relative humidity is low, the amount of moisture absorbed at saturation is smaller.
    Figure 9 shows comparative data for the moisture absorption characteristics of a 100-pin QFP (resin thickness: 2.7 mm) and a 20-pin SSOP (resin thickness: 1.2 mm) in a shelf environment at a temperature of 85°C and a relative humidity of 85% RH, using identical encapsulating resin. As understood by the diagram, the time to saturated moisture absorption varies with package size.
    When a soldering heat test is conducted with actual products, the produces undergo a moisture absorption process prior to testing and each package is evaluated with a different moisture absorption time.
    
    Figure 8 Moisture Absorption Characteristics of 256-Pin LQFPs (1.4 mm Thick) in Various Environments
    
    Figure 9 Package Moisture Absorption Characteristic Comparison at 85°C, 85% RH
    
    Figure 10 Package Moisture Absorption Characteristic Comparison at 85°C, 855 RH
    
    Figure 10 shows comparative data for the moisture absorption characteristics of a 100-pin QFP (resin thickness: 2.7 mm) in a shelf environment at a temperature of 85°C and a relative humidity of 85% RH, using different encapsulating resin. From the diagram it is evident that resin developed with minimal moisture absorption is used for some packages to improve heat resistance.
  - Moisture Removal
    Products with a large package or chip size, or those housed in a thin package, are subject to restrictions with respect to their soldering mount methods. As previously described, this is because the moisture in the package causes abnormalities in the package’s outer appearance when soldering during mounting. To prevent this problem, the device must be baked to remove the moisture from inside the package before it is soldered to the board.
    Figure 11 shows the moisture removal characteristics for a 256-pin LQFP (resin thickness: 1.4 mm) in a shelf environment. The horizontal axis is the time the device is left on the shelf, and the vertical axis is the rate of change of residual moisture content in the package, expressed as wt%.
    The diagram shows that even a package that has become saturated with absorbed moisture can have virtually all moisture removed by backing at 125°C for about 20 hours. Moisture removal characteristics are such that the higher the temperature, the less time required for moisture removal, with residual moisture after baking approaching 0. However, note that when removing moisture from products, the baking temperature is subject to restrictions depending on the thermal resistance of the tray and the device terminal soldering properties. Before moisture removal (baking), refer to the instructions on the product packaging material or contact the manufacturer.
    Note that heat resistant trays are marked "HEAT PROOF," meaning that they can normally resist temperatures of up to 125°C.
  Figure 11 Moisture Absorption Characteristics of 256-Pin LQFP (1.4 mm Thick) at Each Shelf Environment
2. Package Cracking Mechanism
  Figure 12 shows the process by which package cracking occurs. This mechanism is mainly caused by expansion when moisture collected beneath the die pads evaporates.
Figure 12 Package Cracking Mechanism
Other
Since resin has a higher thermal resistance in comparison to metal, if thermal dissipation is inadequate, the chip temperature will increase, lowering operating margins and degrading materials, causing the device to fail. Countermeasures include increasing the thermal conductivity of the resin material or attaching heat sinks. Although this is not problematic design-wise, various failures can still occur if the external temperature rises or power exceeding the rated value is applied.
Resin-encapsulated devices can ignite by accident if the above is not considered. Toshiba is therefore now making flame-resistant resins. The standards for the flame-resistance of resin are defined in the US Underwriters Laboratories Inc. (UL) Standard.

Note 1: Bibliography. Shibuya, Suzuki, Aoki, Iketani; “Surface Characteristics and Moisture Resistance of Plastic Mold Devices,” Reliability study at electronic and communication society, R81-17, (1981), p. 31

Note 2: Bibliography. Tsuda; "New Mechanism Proprosal for Al Open Failures," Nikkei Microdevice, September (1985), p. 50

Note 3: Bibliography. Komatsu, Takahashi, Suzuki, Wakaki; "Analysis Method for Si Pellet Internal Stress in Semiconductor Devices," 8^th JUSE Reliability and Maintainability Symposium Proceedings, (1978), p. 77

Note 4: Bibliography. S. Komatsu, K. Suzuki, N. Iida, T. Aoki; "Stress-Insensitive Diffused Resistor Network for a High Accuracy Monolithic D/A Converter," IEEE, (1980), p. 144

Note 5: Bibliography. H. Matsumoto, et al.; "New Filler-Induced Failure Mechanism in Plastic Encapsulated VLSI Dynamic MOS Memories," IEEE, IRPS, (1985), p. 180