64-bit RISC microprocessor: TX49 Family
The TX49 Family of RISC microprocessors for embedded use is an original Toshiba 64-bit processor family and is based on the RISC architecture designed by MIPS Technologies, Inc. The customer can implement a custom SoC using the TX49 Family cores in conjunction with general-purpose ASSP products.
Features
- 64-bit RISC architecture
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- R4000A architecture
- Upward-compatible instruction set including MIPS I, MIPS II and MIPS III instruction set architectures (ISAs)
- TX49/H2: Internal operating frequency: 200 MHz
- TX49/H3: Internal operating frequency: 300 MHz / 333 MHz
- TX49/H4: Internal operating frequency: 400 MHz
- TX49/L3: Internal operating frequency: 200 MHz
- TX49/L4: Internal operating frequency: 333 MHz
- TX49/W4: Internal operating frequency: 400 MHz
- Capable of installing Level2 caches of up to 512 KB for instructions and data, respectively. (Optional)
- Non-blocking load function
- The instructions which follow the instruction currently being executed are executed while the cache is being refilled.
- DSP function
- Thirty-two 64-bit general-purpose registers
- Optimized 5-stage pipelining
- Single- or double-precision floating-point unit (FPU)
(TX49/H2, TX49/H3, TX49/H4 and TX49/W4 core) - Debug support unit (DSU)
- Supports EJTAG.
- Low-power consumption design
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- Low-power consumption modes (Doze/Halt)
- Built-in high-capacity primary cache
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- Instruction cache: 32KB
- 4-way set-associative
- Lock function supported
- Data cache: 32 Kbytes
- 4-way set-associative
- Lock function supported
- Write-back/write-through (every page)
- Can be used as a CPU core for custom SoC
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- TX49/H2: 0.18-μm process technology
- TX49/H3, TX49/L3: 0.13-μm process technology
- TX49/H4, TX49/L4, TX49/W4: 90-nm process technology
- Complete development environment
- Recommendable Application
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- Printer, PPC, DVD, game, network, STB
- They can be used for various application, not only for above application but also for other purpose.
