MeP document
User's Manual
| Number | Name | Release Date | size |
|---|---|---|---|
| MEPUM05005-E | MeP Core (MeP-c4) User's Manual (Architecture) | 31 Aug,2006 | 1,271KB |
| MEPUM04015-E | MeP Core (MeP-c4) User's Manual (Instruction Set) | 31 Aug,2006 | 2,053KB |
| MEPUM05006-E | MeP Core (MeP-c4) User's Manual(Interface) | 31 Aug,2006 | 455KB |
Catalog
| Number | Name | Release Date | size |
|---|---|---|---|
| BCE0043A | Introduction to the MeP (Media embedded Processor) | Jan,2005 | 599KB |
Related Articles of TOSHIBA REVIEW
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- SCIENCE AND TECHNOLOGY HIGHLIGHTS 2006
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- LSI Chip Set for Digital TV Receiver
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- 63 mW H.264/MPEG-4 Audio/Visual Codec LSI with Module-Wise Dynamic Voltage/Frequency Scaling
- SCIENCE AND TECHNOLOGY HIGHLIGHTS 2004
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- MPEG-4 Encoder and Decoder LSI Integrates High Performance 3D Graphics Engine
- Single-Chip LSI for DVD Player
- SCIENCE AND TECHNOLOGY HIGHLIGHTS 2003
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- MeP Configurable Processor
Recent Publications
- S. Hosoda et al., "A Low-power Mobile Multimedia Processor for Scalable Multi-core System," COOL Chips XI, April, 2008.
- S. Nomura et al., "A 9.7mW AAC Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward Body-biasing and Power-gating Circuit in 65nm CMOS technology," ISSCC Dig. of Tech. Papers, pp.12-13, February, 2008.
- K. Mori et al., "Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)," ASP-DAC 2007, pp.644-648, January, 2007.
- T. Kawabata et al., "Security Enhanced Embedded Processor using Local Memory Protection Mechanism," COOL Chips IX, April, 2006.
- T. Fujiyoshi et al., "A 63-mW H.264/MPEG-4 Audio/Visual Codec LSI with Module-Wise Dynamic Voltage/Frequency Scaling," IEEE J. Solid-State Circuits, vol. 41, no. 1, pp.54-62, January, 2006.
- T. Miyamori, "A 1-GHz Configurable Processor Core - MeP-h1 -," HOT CHIPS 17, August, 2005.
- T. Fujiyoshi et al., "An H.264/MPEG-4 Audio/Visual CODEC LSI with Module-Wise Dynamic Voltage/Frequency Scaling," ISSCC Dig. Tech. Papers, pp.132-133, February, 2005.
- T. Takemoto et al., "T4G: Media Processor including 3D Graphics for Mobile Set based on Configurable Processor," Proc. AP-ASIC2004, pp.156-159, August, 2004.
- T. Furusawa et al., "A DSP Engine for and Extensible Media Embedded Processor," AP-ASIC2004, pp.160-163, August, 2004.
- S. Takaki et al., "Hardware/Software Partitioning Methodology for Systems on Chip (SoCs) with RISC Host and Configurable Microprocessors," IP Based SoC Design 2003.
- J. Tanabe et al., "Visconti: Multi-VLIW Image Recognition Processor based on Configurable Processor," Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.185-188, 2003.
- A. Mizuno et al., Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture," IEEE International Conference on Computer Design, pp.2-7, September, 2002.
- T. Miyamori et al., "A Configurable and Extensible Media Processor," Embedded Processor Forum, 2002.
- T. Shimazawa et al., "ASSP Design Implementation Using Physical Compiler," Synopsys Users Group Conference San Jose 2001, Session MB1, March, 2001.
- K. Kohno et al., "A New Verification Methodology for Complex Pipeline Behavior," DAC 2001.
- Y. Kondo et al., "A 4GOPS 3Way-VLIW Image Recognition Processor Based on a Configurable Media-processor," IEEE International Solid-State Circuits Conference (ISSCC) digest of technical papers, pp.148-149, 2001.