ASSPs
- TV/AV Equipment ICs
- OFDM Demodulation and Error Correction ICs for Digital TV Receivers
- Demodulation and Error Correction IC for DTMB
- Audio ICs
- Communications Equipment ICs
- Interface Bridges (Mobile Peripheral Devices)
- Display Interface Buffer
- Display Interface Bridge
- I/O Expander
- Camera Interface Bridge (HDMI Interface Bridge included)
- Clock Generator
- SD Card Host Controller
- Close Proximity Wireless Transfer Technology TransferJet™-compliant IC
- RF ICs for Specified and Extremely Low-Power Radio Applications
- Automotive ICs
- Mixed-Signal Controllers
- Documents
- Recommended Products by Application
- Important Notices
- News Release/Topics
Display Interface Bridge
Toshiba's Display Interface Bridge has various display interfaces to facilitate design of feature-rich mobile equipment realizing superb picture quality.
Examples of Display Interface Bridge Configurations
MDDI to DSI-Display Interface Bridge /TC358760
Features
- Support MDDI 1.2 Direct refresh (60 fps) up to FWVGA
- Resolution: Up to XGA (1024 × 768, 24 bpp)
- Host interfaces: MDDI 1.2 Type 1
- LCD interfaces: DSI, DPI, DBI
General Specifications
| Supply voltages | 1.2 V (Core), 1.2 V & 1.8 V (MDDI I/O), 1.8-3.3 V (I/O) |
|---|---|
| Package dimensions | 3.5mm × 3.5mm (49 pins) |
| Status/Availability | Mass Production |
DPI/DBI to DSI-Display Interface Bridge /TC358763XBG
Features
- LCD-I/F: MIPI®3 DSI lanes
- Multiple display bridges:
(DPI/DBI->DSI) - Resolution: Up to qHD, WSVGA, XGA (DPI-to-DSI mode)
General Specifications
- Host I/F:DPI 24bit/DBI-B 16/18bit
- LCD I/F:DSI
| Supply voltages | 1.2 V (Core), 1.2 V (MIPI I/O), 1.8-3.3 V (I/O) |
|---|---|
| Package dimensions | 4.5mm × 4.5mm (72 pins) |
| Status/Availability | Mass Production |
MIPI® Display Interface Bridge /TC358762XBG
Features
- Host interface: MIPI® DSI
- Parallel display outputs: MIPI® DBI Type B, MIPI® DPI
- SPI, MIPI® DBI Type C and GPIOs for traditional peripheral interfaces, and I2C interface for internal register access
- qHD @70 fps (MIPI® DPI), FWVGA @60 fps (MIPI® DBI Type B)
- The source of the internal system clock is selectable from the DSI Clock or a clock derived by multiplying an external clock with on-chip PLL..
General Specifications
| Supply voltages | 1.2 V (Core), 1.2 V (MIPI® I/O), 1.8-3.3 V (I/O) |
|---|---|
| Package dimensions | 5.0mm × 5.0mm (64 pins) |
| Status/Availability | Mass Production |
MIPI® DSI to LVDS Display Interface Bridge /TC358764XBG/765XBG
Features
- Host interface: MIPI® DSI（4 DSI RX lanes）
- Single Link(TC358764XBG), Dual Link (TC358765XBG)
- I2C (master) and GPIO interfaces for peripheral device control and I2C (slave) interface for on-chip register programming
- TC358764XBG: Up to WXGA resolution (1366 × 768, 24 bpp)
TC358765XBG: Up to WUXGA resolution (1920 × 1200, 18 bpp; 1600 × 1200, 24 bpp)
General Specifications
| Supply voltages | 1.2 V (Core), 1.2 V (MIPI® I/O), 3.3 V (LVDS I/O), 1.8-3.3 V (I/O) |
|---|---|
| Package dimensions | TC358764XBG: 5.0mm × 5.0mm 0.65mm Ball pitch (49 pins) TC358765XBG: 6.0mm × 6.0mm 0.65mm Ball pitch (64 pins) |
| Status/Availability | Mass Production |
MIPI® DSI/DPI to Display Port Display Interface Bridge /TC358766XBG
Features
- Host interface: MIPI®DSI (4 DSI RX lanes, 1 Gbps/lane), DPI (up to 154 MHz)
- Panel interface: VESA Display Port 1.1a (Single/Dual lane, 1.62 or 2.7 Gbps/lane)
- WUXGA: Up to (1920 × 1200, 24 bpp)
- HDCP 1.3 - I2C (slave) and SPI (slave) interfaces for internal register access
- Audio interface: I2S
General Specifications
| Summary |  Product Brief (166KB) |
|---|---|
| Supply voltages | 1.2 V (Core), 1.2 V & 1.8 V (Display Port), 1.2 V (MIPI® I/O) 1.8 V -3.3 V (I/O) |
| Package dimensions | 6.0 mm × 6.0 mm (120 pins) |
| Status/Availability | ES: Available, Mass-production target: Q4, 2012 |
MIPI® DSI/DPI to Display Port Display Interface Bridge /TC358767XBG
Features
- Host interface: MIPI®DSI (4 DSI RX lanes, 1 Gbps/lane)
- Panel interface: VESA Display Port 1.1a (Single/Dual lane, 1.62 or 2.7 Gbps/lane)
- WUXGA: Up to (1920 × 1200, 24 bpp)
- HDCP 1.3 - I2C (slave) and SPI (slave) interfaces for internal register access
- Audio interface: I2S
General Specifications
| Supply voltages | 1.2 V (Core), 1.2 V & 1.8 V (Display Port), 1.2 V (MIPI® I/O) 1.8 V -3.3 V (I/O) |
|---|---|
| Package dimensions | 5.0 mm × 5.0 mm (81 pins) |
| Status/Availability | ES: Available, Mass-production target: Q4, 2012 |
MIPI® DPI to MIPI® DSI Display Interface Bridge /TC358768XBG
Features
- Host interface: MIPI® DPI (up to 154 MHz)
- Panel interface: MIPI® DSI (4 DSI RX lanes, 1 Gbps/lane)
- WUXGA: Up to (1920 × 1200, 24 bpp)
- I2C (slave) and SPI (slave) interfaces for internal register access
General Specifications
| Supply voltages | 1.2 V (Core), 1.8 V - 3.3 V (I/O), 1.2 V (MIPI® I/O) |
|---|---|
| Package dimensions | 4.5 mm × 4.5 mm (72 pins) |
| Status/Availability | Mass Production |
MIPI® DSI/DPI to Display Port Display Interface Bridge /TC358770XBG
Features
- Host interface: MIPI®DSI (4 DSI RX lanes x 2ch, 1 Gbps/lane)
- Panel interface: VESA Display Port 1.1a (Up to 4 lanes, 1.62 or 2.7 Gbps/lane)
- QSXGA: Up to (2560 × 2048, 24 bpp)
- HDCP 1.3 - I2C (slave) and SPI (slave) interfaces for internal register access
- Audio interface: I2S
General Specifications
| Supply voltages | 1.2 V (Core), 1.2V & 1.8V (Display Port), 1.2 V (MIPI® I/O) 1.8 V -3.3 V (I/O) |
|---|---|
| Package dimensions | 5.0 mm × 5.0 mm (100 pins) |
| Status/Availability | ES: Available, Mass-production target: Q4, 2012 |
MIPI®DSI to LVDS Display Interface Bridge /TC358774/75XBG
Features
- Host interface: MIPI® DSI（4 DSI RX lanes）
- Single Link(TC358774XBG), Dual Link (TC358775XBG)
- I2C (master) and GPIO interfaces for peripheral device control and I2C (slave) interface for on-chip register programming
- TC358774XBG: Up to UXGA resolution (1600 × 1200, 24 bpp)
TC358775XBG: Up to WUXGA resolution (1920 × 1200, 24 bpp) - Low power version of the TC358764XBG and TC358765XBG
General Specifications
| Supply voltages | 1.2 V (Core), 1.2 V (MIPI® I/O), 3.3 V (LVDS I/O), 1.8 V -3.3 V (I/O) |
|---|---|
| Package dimensions | TC358774XBG: 5.0 mm × 5.0 mm 0.65 mm Ball pitch (49 pins) TC358775XBG: 6.0 mm × 6.0 mm 0.65 mm Ball pitch (64 pins) |
| Status/Availability | ES: Q4, 2013, Mass-production target: Q4, 2013 |
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