DFM (Design For Manufacturing)
Overview
With shrinking process technologies, design-for-manufacturing (DFM) is becoming of utmost importance. Toshiba uses a DFM flow as shown below in order to ensure maximum yield and quality. DFM optimization provides low-cost and fast-turnaround solutions for SoC design. Toshiba is now developing a DFM environment for 28-nm process, the next technology node.
Key DFM techniques include:
- Double-via replacement
- Lithography-aware design
- Metal density control
Double-Via Replacement
Replacing single vias with redundant (or double) vias on signal nets improves route quality without increasing the chip size.
Lithography-Aware Design
At the physical layout stage, lithography hotspots, or wire patterns that will be sensitive to process window variations in lithography, are identified and corrected in order to improve yield and quality. After layout, a design goes through quick lithography hotspot analysis and fixing.
Metal Density Balancing
When it comes to multi-layer metallization, unbalanced metal density across a chip may cause yield loss. Toshiba performs metal density analysis on each metal layer at the back end of physical layout. To improve yield, dummy metal patterns are added to less populated locations to balance overall metal density.
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