BiCD-0.13/CD-0.13 Analog Power Process Platform
Toshiba has developed a BiCD-0.13 process technology that allows integration of 0.13-micron high-voltage analog elements on the same chip. This process combines LDMOS, bipolar transistors and a variety of analog elements, based on a 0.13-micron standard CMOS technology. In addition, to address the need for cost-sensitive applications, Toshiba has developed a CD-0.13 process technology, which has done away with bipolar transistors.
Both BiCD-0.13 and CD-0.13 processes are suitable for a wide range of high-voltage analog applications, such as power management and LED driver ICs, and are targeted for automotive, industrial and commercial use. We have optimized the device structures by leveraging a 0.13-micron process and implementing simulation techniques using TCAD. In particular, ｔhe new LDMOS devices, rated at 8 V, 18 V, 25 V, 40 V and 60 V, boast the industry's lowest specific on-resistance, RonA. The combination of smaller device geometry and Deep Trench Isolation (DTI) has resulted in 32% reduction in the area of a 40-V DMOS device, compared to the 0.35-micron predecessor. Toshiba has begun shipment of ICs fabricated with new processes in March 2010.
For details, see the following papers:
- 0.13μm CMOS/DMOS platform technologywith novel 8V/9V LDMOS for low voltage high-frequency DC-DC converters (ISPSD 2010) (PDF:318KB)
- Ultra-low On-Resistance LDMOS Implementation in 0.13μm CD and BiCD Process Technologies for Analog Power IC's (ISPSD 2009) (PDF:391KB)
- A Deep Trench Isolation integrated in a 0.13um BiCD process technology for analog power ICs. (BCTM 2009) (PDF:897KB)